54th IEEE Semiconductor Interface Specialists Conference
Bahia Resort Hotel, San Diego, CA
December 13 – 16, 2023 (Tutorial: Dec 13)

The 2023 Conference Program is available here.

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2023 Confirmed Technical Invited Talks

The technical program will be complemented by Invited Presentations from both industry and academia.

  • Prof. Masaharu Kobayashi, U. Tokyo, Japan
    Oxide Semiconductor Transistors for LSI Application
  • Dr. Anabela Veloso, imec, Belgium
    Entering a New Era of Nanosheet-based FET Device Architectures with Increased FEOL-BEOL Synergies
  • Prof. Sarit Dhar, Auburn University, USA
    Interface Trapping and Scattering in 4H-SiC MOSFETs
  • Prof. Daniel Gall, RPI, USA
    Interconnects: New Materials for High Conductivity
  • Prof. Hyunsang Hwang, POSTECH, Korea
    Ovonic Threshold Switching (OTS) Device for Selector Applications
  • Dr. Ashish Penumatcha, Intel, USA
    Enabling Gate-Pitch Scaling in the Angstrom Era
  • Prof. Bilge Yildiz, MIT, USA
    Protonic Electrochemical Synapses for Analog Deep Learning and Beyond
  • Prof. Enxia Zhang, Vanderbilt University, USA
    Radiation Effects and Reliability of 3D ICs

The Wed Tutorial will shed light on a single topic in depth, particularly benefiting students and newcomers to the field.

  • Dr. Dale McHerron IBM, USA
    From Interconnects to Chiplets: Materials and Interfaces for Advanced Packaging
  • Recent technology trends in areas such as CMOS scaling, artificial intelligence, computational workloads, including data centers and at the edge, are driving a resurgence in packaging technology innovations, particularly with Heterogeneous Integration and chiplet architectures. This tutorial will analyze these developments with particular focus on the materials, processes, and interfaces that are at the center of these new innovations. I will provide an overview of packaging technology fundamentals to put these technologies in context as well as highlight some of the challenges and opportunities that are emerging.

    The tutorial will also explore these technology trends and why advanced packaging technologies are so critical to address the challenges and opportunities presenting themselves and ultimately provide improvements in performance and cost required for next generation computational systems and associated hardware architectures. I will put some focus on trends and advancements in artificial intelligence, as this technology is creating unique opportunities for advanced packaging and chiplet architectures to enable significant performance gains and energy efficiency improvements over the next decade.

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Past SISC programs are available here.